i.e. DVZ = 0.

In all cases, we indicate load resistance by RL

[caption id="attachment_718" align="aligncenter" width="538"] Series voltage regulator circuit diagram[/caption]

- Assume supply voltage increases by DVS

Current through resistance R is IR = (VS-Vz )/R

or, DIR = DVS / R (Equation 1.1)

Also IR = IB + IZ ; or, DIR = DIB + DIZ ; (Equation 1.2)

From Equation 1.1 and Equation 1.2, an increase in VS increases base current IB and zener current IZ. Since collector current IC = ÃŸ*IB so IC also increases.

We know IE = IB + IC;

or, (since IB is very small compared to IC)

DIE = DIC

As IC increases, IE will also increase through load RL, thus voltage output VO = IE*RL tends to increase. (Effect 1: VO tends to increase)

Using KVL in output circuit, VO + VBE – VZ = 0; where VBE = base emitter voltage, VZ = zener voltage

DVO = -DVBE (Equation 1.3)

Equation 1.3 suggests, an increase in output voltage VO decrease base emitter voltage VBE. As decrease in VBE causes decrease in IC , and conversely IEthrough RL , hence output voltage VO tends to decrease. (Effect 2: VO tends to decrease)

Effect 1 and Effect 2 neutralise each other and VO is constant.

Opposite happens when VS decreases.

- Assume supply current IS increases by DIS (keeping VS constant)

IS = IC + IR; or, DIS = DIC + DIR (Equation 2.1)

IR = IB + IZ; or, DIR = DIB + DIZ (Equation 2.2)

From Equation 2.1, IS increases IC (also IR). Also this is evident as from Equation 2.2, that increase in IR increases IB and hence increases IC.

As IE˜IC so IE increases through RL. Hence output voltage VO = IE*RL tends to increase.

(Effect 1: VO tends to increase)

Remaining analysis is similar to previous case. VO tends to increase decreasing VBE (like Equation 1.3). This decreases IC, consequently decreasing IE and this tends to decrease VO.

(Effect 2: VO tends to decrease)

Effect 1 and Effect 2 neutralise each other and VO is constant.

## Short circuit protection

To prevent short circuit i.e. to prevent an excessive high flow of current, the following arrangement is made.

A very small resistance RSC is connected in series with the load. The base emitter terminals of BJT Q2 are connected across this RSC resistance. When a high current flows across the load, an appreciable amount of voltage is developed across RSC. Hence base emitter voltage of Q2 increases, collector current of Q2 increases, so IB is shunted away from Q1. As IE˜IC= ÃŸ*IB , hence IE decreases and a large current flow is prevented.

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