Following figure shows circuit diagram of parallel ADC or flash ADC.
n-bit Flash ADC consist of parallel combination of 2^n-1 comparators. Outputs of all comparators are connected to an encoder.
Working Principle of flash ADC
Analog voltage is applied to non inverting terminals of all comparators using a single line. Reference voltage is applied to inverting terminals of comparators using divider circuit.
Each comparator produces digital output in the form of 1 or 0. If unknown analog voltage is greater than reference voltage comparator produces high logic. If analog voltage is less than reference voltage then comparator produces low logic i.e. 0.
Thus all parallel comparator produces digital representation of analog voltage in the form of zero and one. These outputs of comparator are then applied to the fast encoder. Encoder converts those zeros and once into binary number and produces digital binary output.
For example, see below table. When unknown voltage is 5 i.e. lies between 4.375 &5.625 is applied to the flash ADC, first four encoders produces output ‘1’ and last three encoders produces output ‘0’. Encoder converts this ‘1111000’ comparator output into ‘100’ binary number as digital output.
Table shows the outputs of comparators and encoder for a 3 bit flash ADC. The range of operation is given as 0-10V.
Analog input (V) | Comparator Output | Encoder Output | ||||||||
C1 | C2 | C3 | C4 | C5 | C6 | C7 | D2 | D1 | D0 | |
0.000-0.625 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
0.625-1.875 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
1.875-3.125 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
3.125-4.375 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
4.375-5.625 | 1 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 |
5.625-6.875 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 1 |
6.875-8.125 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |
8.125-10.000 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
As the number of bits of ADC increases its resolution increases. But such high bit converter is bulky and expensive.
Also see: Sigma Delta ADC or noise eliminating ADC.
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